实现单片机步进电机功能第一个模块，大家帮忙看看还缺什么改进一下

ID:356821 · 发表于 2018-6-22 18:50

ibrary ieee
use ieee. std_logic-1164. All
use ieee. std_logic-arith all
use ieee. std logic-uns igned. All
entity freq is
port(clk-sys : in std_logic

clk_new : out std_logic)

end freq

circhitecture one of freq is
signal set : std_logic

signal cnt : std_logic-vector ( 17 downto O )begin

process ( clk_sys)

begin

if set ='1'then
cnt ="011111111111111111"
'elsif clk-sys'event and clk_sys = '1'then

Cnt = cnt-1

end if
end process
set« = cnt( 17)
clk new = cnt ( 16)
end one

帐号		自动登录	找回密码
密码			立即注册