module yiwei(clk_100hz, clr, led_cs, led_out);
input clk_100hz;
input clr;
output led_cs;
output reg [7:0] led_out;
reg dir;
assign led_cs=1;
always@(posedge clk_100hz or negedge clr)
if(!clr)
begin
dir<=0;
led_out<=8'h80;
end
else
begin
if(dir==0)
begin
led_out<=led_out>>1;
if(led_out==8'h01)
dir<=1;
end
if(dir==1)
begin
led_out<=led_out<<1;
if(led_out==8'h80)
dir<=0;
end
end
endmodule
输出时并没有8‘h01这一值，就7个灯来回闪烁，希望帮忙解答一下。
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